AMEVTYPER1<n>, Activity Monitors Event Type Registers 1, n = 0 - 15
The AMEVTYPER1<n> characteristics are:
Provides information on the events that an auxiliary activity monitor event counter AMEVCNTR1<n> counts.
External register AMEVTYPER1<n> bits [31:0] are architecturally mapped to AArch64 System register AMEVTYPER1<n>_EL0[31:0] .
External register AMEVTYPER1<n> bits [31:0] are architecturally mapped to AArch32 System register AMEVTYPER1<n>[31:0] .
The power domain of AMEVTYPER1<n> is IMPLEMENTATION DEFINED.
This register is present only when AMUv1 is implemented. Otherwise, direct accesses to AMEVTYPER1<n> are RES0.
AMEVTYPER1<n> is a 32-bit register.
The AMEVTYPER1<n> bit assignments are:
evtCount, bits [15:0]
Event to count. The event number of the event that is counted by the auxiliary activity monitor event counter AMEVCNTR1<n>.
It is IMPLEMENTATION DEFINED what values are supported by each counter.
If software writes a value to this field which is not supported by the corresponding counter AMEVCNTR1<n>, then:
- It is UNPREDICTABLE which event will be counted.
- The value read back is UNKNOWN.
The event counted by AMEVCNTR1<n> might be fixed at implementation. In this case, the field is read-only and writes are UNDEFINED.
If the corresponding counter AMEVCNTR1<n> is enabled, writes to this register have UNPREDICTABLE results.
Accessing the AMEVTYPER1<n>
If <n> is greater than or equal to the number of auxiliary activity monitor event counters, reads of AMEVTYPER1<n> are RAZ/WI. Software must treat reserved accesses as RES0. See 'Access requirements for reserved and unallocated registers'.
AMCGCR.CG1NC identifies the number of auxiliary activity monitor event counters.
AMEVTYPER1<n> can be accessed through the memory-mapped interfaces:
|AMU||0x480 + 4n||AMEVTYPER1<n>|
Accesses on this interface are RO.