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DBGBVR<n>_EL1, Debug Breakpoint Value Registers, n = 0 - 15

The DBGBVR<n>_EL1 characteristics are:

Purpose

Holds a virtual address, or a VMID and/or a context ID, for use in breakpoint matching. Forms breakpoint n together with control register DBGBCR<n>_EL1.

Configuration

External register DBGBVR<n>_EL1 bits [63:0] are architecturally mapped to AArch64 System register DBGBVR<n>_EL1[63:0] .

External register DBGBVR<n>_EL1 bits [31:0] are architecturally mapped to AArch32 System register DBGBVR<n>[31:0] .

External register DBGBVR<n>_EL1 bits [63:32] are architecturally mapped to AArch32 System register DBGBXVR<n>[31:0] .

DBGBVR<n>_EL1 is in the Core power domain.

If breakpoint n is not implemented then accesses to this register are:

  • RES0 when IsCorePowered() && !DoubleLockStatus() && !OSLockStatus() && AllowExternalDebugAccess().
  • A CONSTRAINED UNPREDICTABLE choice of RES0 or ERROR otherwise.

Attributes

How this register is interpreted depends on the value of DBGBCR<n>_EL1.BT.

  • When DBGBCR<n>_EL1.BT is 0b0x0x, this register holds a virtual address.
  • When DBGBCR<n>_EL1.BT is 0b001x, 0b011x, or 0b110x, this register holds a Context ID.
  • When DBGBCR<n>_EL1.BT is 0b100x, this register holds a VMID.
  • When DBGBCR<n>_EL1.BT is 0b101x, this register holds a VMID and a Context ID.
  • When DBGBCR<n>_EL1.BT is 0b111x, this register holds two Context ID values.

For other values of DBGBCR<n>_EL1.BT, this register is RES0.

Field descriptions

The DBGBVR<n>_EL1 bit assignments are:

When DBGBCR<n>_EL1.BT == 0b0x0x:
6362616059585756555453525150494847464544434241403938373635343332
RESS[14:4]VA[52:49]VA[48:2]
VA[48:2]RES0

RESS[14:4], bits [63:53]

Reserved, Sign extended. Software must treat this field as RES0 if the most significant bit of VA is 0 or RES0, and as RES1 if the most significant bit of VA is 1.

Hardware always ignores the value of these bits and it is IMPLEMENTATION DEFINED whether:

  • The bits are hardwired to a copy of the most significant bit of VA, meaning writes to these bits are ignored, and reads to the bits always return the hardwired value.
  • The value in those bits can be written, and reads will return the last value written. The value held in those bits is ignored by hardware.

VA[52:49], bits [52:49]

When ARMv8.2-LVA is implemented:

Extension to VA[48:2]. See VA[48:2] for more details.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.


Otherwise:

Extension to RESS[14:4]. See RESS[14:4] for more details.

VA[48:2], bits [48:2]

If the address is being matched in an AArch64 stage 1 translation regime:

  • This field contains bits[48:2] of the address for comparison.
  • When ARMv8.2-LVA is implemented, VA[52:49] forms the upper part of the address value. Otherwise, VA[52:49] are RESS.

If the address is being matched in an AArch32 stage 1 translation regime, the first 20 bits of this field are RES0, and the rest of the field contains bits[31:2] of the address for comparison.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

Bits [1:0]

Reserved, RES0.

When DBGBCR<n>_EL1.BT == 0b001x:
6362616059585756555453525150494847464544434241403938373635343332
RES0
ContextID

Bits [63:32]

Reserved, RES0.

ContextID, bits [31:0]

Context ID value for comparison.

The value is compared against CONTEXTIDR_EL2 when ARMv8.1-VHE is implemented, EL2 is using AArch64, HCR_EL2.E2H is 1, and either:

  • The PE is executing at EL2.
  • HCR_EL2.TGE is 1, the PE is executing at EL0, and EL2 is enabled in the current Security state.

Otherwise, the value is compared against the following:

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

When DBGBCR<n>_EL1.BT == 0b011x, EL2 is implemented and (ARMv8.1-VHE is implemented or ARMv8.2-Debug is implemented):
6362616059585756555453525150494847464544434241403938373635343332
RES0
ContextID

Bits [63:32]

Reserved, RES0.

ContextID, bits [31:0]

Context ID value for comparison against CONTEXTIDR_EL1.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

When DBGBCR<n>_EL1.BT == 0b100x and EL2 is implemented:
6362616059585756555453525150494847464544434241403938373635343332
RES0VMID[15:8]VMID[7:0]
RES0

Bits [63:48]

Reserved, RES0.

VMID[15:8], bits [47:40]

When ARMv8.1-VHE is implemented and VTCR_EL2.VS == 1:

Extension to VMID[7:0]. See DBGBVR<n>_EL1.VMID[7:0] for more details.

If EL2 is using AArch32, this field is RES0.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.


Otherwise:

Reserved, RES0.

VMID[7:0], bits [39:32]

VMID value for comparison.

The VMID is 8 bits when any of the following are true:

  • EL2 is using AArch32.
  • VTCR_EL2.VS is 0.
  • ARMv8.1-VMID16 is not implemented.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

Bits [31:0]

Reserved, RES0.

When DBGBCR<n>_EL1.BT == 0b101x and EL2 is implemented:
6362616059585756555453525150494847464544434241403938373635343332
RES0VMID[15:8]VMID[7:0]
ContextID

Bits [63:48]

Reserved, RES0.

VMID[15:8], bits [47:40]

When ARMv8.1-VMID16 is implemented and VTCR_EL2.VS == 1:

Extension to VMID[7:0]. See DBGBVR<n>_EL1.VMID[7:0] for more details.

If EL2 is using AArch32, or if the implementation has an 8-bit VMID, this field is RES0.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.


Otherwise:

Reserved, RES0.

VMID[7:0], bits [39:32]

VMID value for comparison.

The VMID is 8 bits when any of the following are true:

  • EL2 is using AArch32.
  • VTCR_EL2.VS is 0.
  • ARMv8.1-VMID16 is not implemented.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

ContextID, bits [31:0]

Context ID value for comparison against CONTEXTIDR_EL1.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

When DBGBCR<n>_EL1.BT == 0b110x, EL2 is implemented and (ARMv8.1-VHE is implemented or ARMv8.2-Debug is implemented):
6362616059585756555453525150494847464544434241403938373635343332
ContextID2
RES0

ContextID2, bits [63:32]

Context ID value for comparison against CONTEXTIDR_EL2.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

Bits [31:0]

Reserved, RES0.

When DBGBCR<n>_EL1.BT == 0b111x, EL2 is implemented and (ARMv8.1-VHE is implemented or ARMv8.2-Debug is implemented):
6362616059585756555453525150494847464544434241403938373635343332
ContextID2
ContextID
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210
313029282726252423222120191817161514131211109876543210

ContextID2, bits [63:32]

Context ID value for comparison against CONTEXTIDR_EL2.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

ContextID, bits [31:0]

Context ID value for comparison against CONTEXTIDR_EL1.

The following resets apply:

  • On a Cold reset, this field resets to an architecturally UNKNOWN value.

  • On an External debug reset, the value of this field is unchanged.

  • On a Warm reset, the value of this field is unchanged.

Accessing the DBGBVR<n>_EL1

Note

SoftwareLockStatus() depends on the type of access attempted and AllowExternalDebugAccess() has a new definition from Armv8.4. Refer to the Pseudocode definitions for more information.

DBGBVR<n>_EL1 can be accessed through the external debug interface:

ComponentOffsetInstanceRange
Debug0x400 + 16nDBGBVR<n>_EL163:0

This interface is accessible as follows:

  • When IsCorePowered(), !DoubleLockStatus(), !OSLockStatus(), AllowExternalDebugAccess() and SoftwareLockStatus() accesses to this register are RO.
  • When IsCorePowered(), !DoubleLockStatus(), !OSLockStatus(), AllowExternalDebugAccess() and !SoftwareLockStatus() accesses to this register are RW.
  • Otherwise accesses to this register generate an error response.