ERRCIDR1, Component Identification Register 1
The ERRCIDR1 characteristics are:
Provides discovery information about the component.
For more information, see 'About the Peripheral identification scheme'.
Implementation of this register is OPTIONAL.
ERRCIDR1 is implemented only as part of a memory-mapped group of error records.
ERRCIDR1 is a 32-bit register.
The ERRCIDR1 bit assignments are:
CLASS, bits [7:4]
Generic peripheral with IMPLEMENTATION DEFINED register layout.
Other values are defined by the CoreSight Architecture.
This field reads as 0xF.
PRMBL_1, bits [3:0]
Component identification preamble, segment 1.
This field reads as 0x0.
Accessing the ERRCIDR1
ERRCIDR1 can be accessed through the memory-mapped interfaces:
Accesses on this interface are RO.