ERRPIDR4, Peripheral Identification Register 4
The ERRPIDR4 characteristics are:
Provides discovery information about the component.
For more information, see 'About the Peripheral identification scheme'.
Implementation of this register is OPTIONAL.
ERRPIDR4 is implemented only as part of a memory-mapped group of error records.
ERRPIDR4 is a 32-bit register.
The ERRPIDR4 bit assignments are:
SIZE, bits [7:4]
Size of the component.
The distance from the start of the address space used by this component to the end of the component identification registers.
A value of 0b0000 means one of the following is true:
- The component uses a single 4KB block.
- The component uses an IMPLEMENTATION DEFINED number of 4KB blocks.
Any other value means the component occupies 2ERRPIDR4.SIZE 4KB blocks.
Using this field to indicate the size of the component is deprecated. This field might not correctly indicate the size of the component. Arm recommends that software determine the size of the component from the Unique Component Identifier fields, and other IMPLEMENTATION DEFINED registers in the component.
DES_2, bits [3:0]
Designer, JEP106 continuation code. This is the JEDEC-assigned JEP106 bank identifier for the designer of the component, minus 1. The code identifies the designer of the component, which might not be not the same as the implementer of the device containing the component. To obtain a number, or to see the assignment of these codes, contact JEDEC http://www.jedec.org.
For a component designed by Arm Limited, the JEP106 bank is 5, meaning this field has the value 0x4.
Accessing the ERRPIDR4
ERRPIDR4 can be accessed through the memory-mapped interfaces:
Accesses on this interface are RO.