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GICD_TYPER2, Interrupt Controller Type Register 2

The GICD_TYPER2 characteristics are:

Purpose

Provides information about which features the GIC implementation supports.

Configuration

This register is present only when GICv4.1 is implemented. Otherwise, direct accesses to GICD_TYPER2 are RES0.

When GICD_CTLR.DS == 0, this register is Common.

Attributes

GICD_TYPER2 is a 32-bit register.

Field descriptions

The GICD_TYPER2 bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0nASSGIcapVILRES0VID

Bits [31:9]

Reserved, RES0.

nASSGIcap, bit [8]

Indicates whether SGIs can be configured to not have an active state.

nASSGIcapMeaning
0b0

SGIs have an active state.

0b1

SGIs can be globally configured not to have an active state.

This bit is RES0 on implementations that support two Security states.

VIL, bit [7]

Indicates whether 16 bits of vPEID are implemented.

VILMeaning
0b0

GIC supports 16-bit vPEID.

0b1

GIC supports GICD_TYPER2.VID + 1 bits of vPEID.

Bits [6:5]

Reserved, RES0.

VID, bits [4:0]

When GICD_TYPER2.VIL == 1, the number of bits is equal to the bits of vPEID minus one.

When GICD_TYPER2.VIL == 0, this field is RES0.

Accessing the GICD_TYPER2

GICD_TYPER2 can be accessed through the memory-mapped interfaces:

ComponentOffsetInstance
GIC Distributor0x000CGICD_TYPER2

This interface is accessible as follows:

  • When GICD_CTLR.DS == 0b0 accesses to this register are RO.
  • When IsAccessSecure() accesses to this register are RO.
  • When !IsAccessSecure() accesses to this register are RO.