AMCIDR1, Activity Monitors Component Identification Register 1
The AMCIDR1 characteristics are:
Provides information to identify an activity monitors component.
For more information, see 'About the Component identification scheme'.
The power domain of AMCIDR1 is IMPLEMENTATION DEFINED.
Implementation of this register is OPTIONAL.
This register is present only when FEAT_AMUv1 is implemented.
AMCIDR1 is a 32-bit register.
The AMCIDR1 bit assignments are:
CLASS, bits [7:4]
Other values are defined by the CoreSight Architecture.
This field reads as 0x9.
PRMBL_1, bits [3:0]
Reads as 0b0000.
Accessing the AMCIDR1
AMCIDR1 can be accessed through the memory-mapped interfaces:
Accesses on this interface are RO.