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CTIDEVCTL, CTI Device Control register

The CTIDEVCTL characteristics are:

Purpose

Provides target-specific device controls

Configuration

CTIDEVCTL is in the Debug power domain.

This register is present only when FEAT_DoPD is implemented. Otherwise, direct accesses to CTIDEVCTL are RES0.

Attributes

CTIDEVCTL is a 32-bit register.

Field descriptions

The CTIDEVCTL bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0RCEOSUCE

Bits [31:2]

Reserved, RES0.

RCE, bit [1]

Reset Catch Enable.

RCEMeaning
0b0

Reset Catch debug event disabled.

0b1

Reset Catch debug event enabled.

On a Cold reset, the value of this field is unchanged.

On an External debug reset, this field resets to 0.

On a Warm reset, the value of this field is unchanged.

OSUCE, bit [0]

OS Unlock Catch Enable

OSUCEMeaning
0b0

OS Unlock Catch debug event disabled.

0b1

OS Unlock Catch debug event enabled.

On a Cold reset, the value of this field is unchanged.

On an External debug reset, this field resets to 0.

On a Warm reset, the value of this field is unchanged.

Accessing the CTIDEVCTL

CTIDEVCTL can be accessed through the external debug interface:

ComponentOffsetInstance
CTI0x150CTIDEVCTL

This interface is accessible as follows:

  • When SoftwareLockStatus() accesses to this register are RO.
  • When !SoftwareLockStatus() accesses to this register are RW.