EDDEVARCH, External Debug Device Architecture register
The EDDEVARCH characteristics are:
Purpose
Identifies the programmers' model architecture of the external debug component.
Configuration
Implementation of this register is OPTIONAL.
If FEAT_DoPD is implemented, this register is in the Core power domain.
If FEAT_DoPD is not implemented, this register is in the Debug power domain.
Attributes
EDDEVARCH is a 32-bit register.
Field descriptions
The EDDEVARCH bit assignments are:
ARCHITECT, bits [31:21]
Defines the architecture of the component. For debug, this is Arm Limited.
Bits [31:28] are the JEP106 continuation code, 0x4.
Bits [27:21] are the JEP106 ID code, 0x3B.
PRESENT, bit [20]
When set to 1, indicates that the DEVARCH is present.
This field is 1 in Armv8.
REVISION, bits [19:16]
Defines the architecture revision. For architectures defined by Arm this is the minor revision.
For debug, the revision defined by Armv8-A is 0x0.
All other values are reserved.
ARCHVER, bits [15:12]
Defines the architecture version of the component. This is the same value as ID_AA64DFR0_EL1.DebugVer and DBGDIDR.Version. The defined values of this field are:
ARCHVER | Meaning |
---|---|
0b0110 |
Armv8.0 Debug architecture. |
0b0111 |
Armv8.0 Debug architecture with Virtualization Host Extensions. |
0b1000 |
Armv8.2 Debug architecture. |
0b1001 |
Armv8.4 Debug architecture. |
FEAT_Debugv8p4 adds the functionality indicated by the value 0b1001. FEAT_Debugv8p2 adds the functionality indicated by the value 0b1000. If FEAT_VHE is not implemented, the only permitted value is 0b0110.
The fields ARCHVER and ARCHPART together form the field ARCHID, so that ARCHVER is ARCHID[15:12].
ARCHPART, bits [11:0]
ARCHPART | Meaning |
---|---|
0xA15 |
The part number of the Armv8-A debug component. |
The fields ARCHVER and ARCHPART together form the field ARCHID, so that ARCHPART is ARCHID[11:0].
Accessing the EDDEVARCH
EDDEVARCH can be accessed through the external debug interface:
Component | Offset | Instance |
---|---|---|
Debug | 0xFBC | EDDEVARCH |
This interface is accessible as follows:
- When FEAT_DoPD is not implemented or IsCorePowered() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.