MPAMF_CCAP_IDR, MPAM Features Cache Capacity Partitioning ID register
The MPAMF_CCAP_IDR characteristics are:
Purpose
Indicates the number of fractional bits in MPAMCFG_CMAX.CMAX. MPAMF_CCAP_IDR_s indicates the number of fractional bits in the Secure instance of MPAMCFG_CMAX. MPAMF_CCAP_IDR_ns indicates the number of fractional bits in the Non-secure instance of MPAMCFG_CMAX.
When MPAMF_IDR.HAS_RIS is 1, some fields in this register give information for the resource instance selected by MPAMCFG_PART_SEL.RIS. The description of every field that is affected by MPAMCFG_PART_SEL.RIS has information within the field description.
Configuration
The power domain of MPAMF_CCAP_IDR is IMPLEMENTATION DEFINED.
This register is present only when MPAMF_IDR.HAS_CCAP_PART == 1. Otherwise, direct accesses to MPAMF_CCAP_IDR are RES0.
Attributes
MPAMF_CCAP_IDR is a 32-bit register.
Field descriptions
The MPAMF_CCAP_IDR bit assignments are:
Bits [31:6]
Reserved, RES0.
CMAX_WD, bits [5:0]
Number of fractional bits implemented in the cache capacity partitioning control, MPAMCFG_CMAX.CMAX, of this device. See MPAMCFG_CMAX.
This field must contain a value from 1 to 16, inclusive.
If RIS is implemented, this field indicates the number of fractional bits in the cache capacity partitioning control for the resource instance selected by MPAMCFG_PART_SEL.RIS.
Accessing the MPAMF_CCAP_IDR
This register is within the MPAM feature page memory frames. In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MPAMF_CCAP_IDR is read-only.
MPAMF_CCAP_IDR must be readable from the Non-secure and Secure MPAM feature pages.
MPAMF_CCAP_IDR is permitted to have the same contents when read from either the Secure and Non-secure MPAM feature pages unless the register contents is different for Secure and Non-secure versions, when there must be separate registers in the Secure (MPAMF_CCAP_IDR_s) and Non-secure (MPAMF_CCAP_IDR_ns) MPAM feature pages.
When MPAMF_IDR.HAS_RIS is 1, MPAMF_CCAP_IDR shows the configuration of cache capacity partitioning for the cache resource instance selected by MPAMCFG_PART_SEL.RIS. Fields that mention RIS in their field descriptions have values that track the implemented properties of the resource instance. Fields that do not mention RIS are constant across all resource instances.
MPAMF_CCAP_IDR can be accessed through the memory-mapped interfaces:
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x0038 | MPAMF_CCAP_IDR_s |
Accesses on this interface are RO.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_ns | 0x0038 | MPAMF_CCAP_IDR_ns |
Accesses on this interface are RO.