You copied the Doc URL to your clipboard.

ID_AA64ISAR2_EL1, AArch64 Instruction Set Attribute Register 2

The ID_AA64ISAR2_EL1 characteristics are:

Purpose

Provides information about the features and instructions implemented in AArch64 state.

For general information about the interpretation of the ID registers, see Principles of the ID scheme for fields in ID registers.

Configuration

This register is present only from Armv8.7. Otherwise, direct accesses to ID_AA64ISAR2_EL1 are UNDEFINED.

Attributes

ID_AA64ISAR2_EL1 is a 64-bit register.

Field descriptions

The ID_AA64ISAR2_EL1 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0RPRESWFxT
313029282726252423222120191817161514131211109876543210

Bits [63:8]

Reserved, RES0.

RPRES, bits [7:4]

When FPCR.AH is 1, indicates support for 12 bits of mantissa in reciprocal and reciprocal square root instructions in AArch64 state. Defined values are:

RPRESMeaning
0b0000

Reciprocal and reciprocal square root estimates give 8 bits of mantissa.

0b0001

Reciprocal and reciprocal square root estimates give 12 bits of mantissa.

All other values are reserved.

FEAT_RPRES implements the functionality identified by the value 0b0001.

From Armv8.7, if Advanced SIMD and floating-point is implemented, the only permitted value is 0b0001.

WFxT, bits [3:0]

Indicates support for the WFET and WFIT instructions in AArch64 state. Defined values are:

WFxTMeaning
0b0000

WFET and WFIT are not supported.

0b0001

WFET and WFIT are supported.

All other values are reserved.

FEAT_WFxT implements the functionality identified by the value 0b0001.

From Armv8.7, the only permitted value is 0b0001.

Accessing the ID_AA64ISAR2_EL1

Accesses to this register use the following encodings:

MRS <Xt>, ID_AA64ISAR2_EL1

op0op1CRnCRmop2
0b110b0000b00000b01100b010
if PSTATE.EL == EL0 then
    if IsFeatureImplemented(FEAT_IDST) then
        if EL2Enabled() && HCR_EL2.TGE == '1' then
            AArch64.SystemAccessTrap(EL2, 0x18);
        else
            AArch64.SystemAccessTrap(EL1, 0x18);
    else
        UNDEFINED;
elsif PSTATE.EL == EL1 then
    if EL2Enabled() && HCR_EL2.TID3 == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    else
        return ID_AA64ISAR2_EL1;
elsif PSTATE.EL == EL2 then
    return ID_AA64ISAR2_EL1;
elsif PSTATE.EL == EL3 then
    return ID_AA64ISAR2_EL1;