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ERRCIDR1, Component Identification Register 1
The ERRCIDR1 characteristics are:
Purpose
Provides discovery information about the component.
For more information, see 'About the Peripheral identification scheme'.
Configuration
Implementation of this register is OPTIONAL.
ERRCIDR1 is implemented only as part of a memory-mapped group of error records.
Attributes
ERRCIDR1 is a 32-bit register.
Field descriptions
The ERRCIDR1 bit assignments are:
Bits [31:8]
Reserved, RES0.
CLASS, bits [7:4]
Component class.
CLASS | Meaning |
---|---|
0b1111 |
Generic peripheral with IMPLEMENTATION DEFINED register layout. |
Other values are defined by the CoreSight Architecture.
This field reads as 0xF.
PRMBL_1, bits [3:0]
Component identification preamble, segment 1.
Reads as 0b0000.
Accessing the ERRCIDR1
ERRCIDR1 can be accessed through the memory-mapped interfaces:
Component | Offset |
---|---|
RAS | 0xFF4 |
Accesses on this interface are RO.