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GITS_STATUSR, ITS Error Reporting Status Register

The GITS_STATUSR characteristics are:

Purpose

Provides software with a mechanism to detect:

  • Accesses to reserved locations.
  • Writes to read-only locations.
  • Reads of write-only locations.
  • Unmapped MSIs.

Configuration

Attributes

GITS_STATUSR is a 32-bit register.

Field descriptions

The GITS_STATUSR bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0SnydromeOverflowUMSIWRODRWODWRDRRD

Bits [31:10]

Reserved, RES0.

Snydrome, bits [9:6]

Syndrome for the MSI that set GITS_STATUSR.UMSI to 1.

SnydromeMeaning
0b0000

Unknown reason.

0b0010

DeviceID out of range.

0b0011

DeviceID unmapped.

0b0100

EventID out of range.

0b0101

EventID unmapped.

0b0111

Collection unmapped.

0b1001

vPEID unmapped.

An implementation might not support reporting all syndromes, and might report 0b0000 for any cause.

This field is UNKNOWN when GITS_STATUSR.UMSI is 0.

Overflow, bit [5]

Reports whether an unmapped MSI has been received while GITS_STATUSR.UMSI is 1.

OverflowMeaning
0b0

No unmapped MSIs have been received since GITS_STATUSR.UMSI set to 1.

0b1

At least one unmapped MSIs have been received since GITS_STATUSR.UMSI set to 1.

A software write of 1 to the bit clears it. A write of any other value is ignored.

If GITS_TYPER.UMSI is 0, this field is RES0.

UMSI, bit [4]

Reports whether an unmapped MSI has been received

UMSIMeaning
0b0

No unmapped MSIs have been received.

0b1

Unampped MSI received.

A software write of 1 to the bit clears it. A write of any other value is ignored.

If GITS_TYPER.UMSI is 0, this field is RES0.

WROD, bit [3]

Write to an RO location.

WRODMeaning
0b0

Normal operation.

0b1

A write to an RO location has been detected.

When a violation is detected, software must write 1 to this register to reset it.

RWOD, bit [2]

Read of a WO location.

RWODMeaning
0b0

Normal operation.

0b1

A read of a WO location has been detected.

When a violation is detected, software must write 1 to this register to reset it.

WRD, bit [1]

Write to a reserved location.

WRDMeaning
0b0

Normal operation.

0b1

A write to a reserved location has been detected.

When a violation is detected, software must write 1 to this register to reset it.

RRD, bit [0]

Read of a reserved location.

RRDMeaning
0b0

Normal operation.

0b1

A read of a reserved location has been detected.

When a violation is detected, software must write 1 to this register to reset it.

Accessing the GITS_STATUSR

This is an optional register. If the register is not implemented, the location is RAZ/WI.

GITS_STATUSR can be accessed through the memory-mapped interfaces:

ComponentOffsetInstance
GIC ITS control0x0020GITS_STATUSR

This interface is accessible as follows:

  • When GICD_CTLR.DS == 0 accesses to this register are RO.
  • When an access is Secure accesses to this register are RW.
  • When an access is Non-secure accesses to this register are RW.