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CNTCV, Counter Count Value register

The CNTCV characteristics are:

Purpose

Indicates the current count value.

Configuration

The power domain of CNTCV is IMPLEMENTATION DEFINED.

On a reset of the reset domain in which an RW instance of this register is implemented, RW fields in the register reset to UNKNOWN values. The register is not affected by a reset of any other reset domain. For more information see 'Power and reset domains for the system level implementation of the Generic Timer' in Chapter I1 of the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Attributes

CNTCV is a 64-bit register.

Field descriptions

The CNTCV bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
CountValue
CountValue
313029282726252423222120191817161514131211109876543210

CountValue, bits [63:0]

Indicates the counter value.

This field resets to an architecturally UNKNOWN value.

Accessing the CNTCV

FrameAccessibility
CNTControlBaseRW
CNTReadBaseRO

A write to CNTCV must be visible in the CNTPCT register of each running processor in a finite time.

For the instance of the register in the CNTControlBase frame:

  • In a system that supports Secure and Non-secure memory maps the CNTControlBase frame, and therefore this register instance, is implemented only in the Secure memory map.
  • If the counter is enabled, the effect of writing to the register is UNKNOWN.

In an implementation that supports 64-bit atomic memory accesses, this register must be accessible using a 64-bit atomic access.

CNTCV can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstanceRange
TimerCNTControlBase0x008CNTCV63:0

Accesses on this interface are RW.

ComponentFrameOffsetInstanceRange
TimerCNTReadBase0x000CNTCV63:0

Accesses on this interface are RO.



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