CTIINEN<n>, CTI Input Trigger to Output Channel Enable registers, n = 0 - 31
The CTIINEN<n> characteristics are:
Enables the signaling of an event on output channels when input trigger event n is received by the CTI.
CTIINEN<n> is in the Debug power domain. RW fields in this register reset to architecturally UNKNOWN values. These apply only on an External debug reset. The register is not affected by a Warm reset and is not affected by a Cold reset.
If input trigger n is not connected, the behavior of CTIINEN<n> is IMPLEMENTATION DEFINED.
CTIINEN<n> is a 32-bit register.
The CTIINEN<n> bit assignments are:
|INEN<x>, bit [x]|
INEN<x>, bit [x], for x = 0 to 31
Input trigger <n> to output channel <x> enable.
Bits [31:N] are RAZ/WI. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.
Possible values of this bit are:
Input trigger <n> will not generate an event on output channel <x>.
Input trigger <n> will generate an event on output channel <x>.
On a External debug reset, this field resets to an architecturally UNKNOWN value.
Accessing the CTIINEN<n>
CTIINEN<n> can be accessed through the external debug interface:
|CTI||0x020 + 4n||CTIINEN<n>|
This interface is accessible as follows:
- When SoftwareLockStatus() accesses to this register are RO.
- When !SoftwareLockStatus() accesses to this register are RW.