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Home Documentation ddi0596 a - Arm® A64 Instruction Set Architecture: Armv8, for Armv8-A architecture profile Top level encodings for A64

Arm® A64 Instruction Set Architecture: Armv8, for Armv8-A architecture profile

Developer Documentation

  • Arm® A64 Instruction Set Architecture: Armv8, for Armv8-A architecture profile
    • A64 -- Base Instructions (alphabetic order)
    • A64 -- SIMD and Floating-point Instructions (alphabetic order)
    • Top level encodings for A64
      • Reserved
      • Data Processing -- Immediate
      • Branches, Exception Generating and System instructions
      • Loads and Stores
      • Data Processing -- Register
      • Data Processing -- Scalar Floating-Point and Advanced SIMD
    • A64 Shared Pseudocode Functions
    • Proprietary Notice
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Top-level encodings for A64

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
op0
Decode fields Instruction details
op0
0000 Reserved
0001 UNALLOCATED
001x UNALLOCATED
100x Data Processing -- Immediate
101x Branches, Exception Generating and System instructions
x1x0 Loads and Stores
x101 Data Processing -- Register
x111 Data Processing -- Scalar Floating-Point and Advanced SIMD
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