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DSB
Data Synchronization Barrier is a memory barrier that ensures the completion of memory accesses, see Data Synchronization Barrier.
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1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | != 0x00 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | |||
CRm | opc |
MemBarrierOp op; MBReqDomain domain; MBReqTypes types; op = MemBarrierOp_DSB; case CRm<3:2> of when '00' domain = MBReqDomain_OuterShareable; when '01' domain = MBReqDomain_Nonshareable; when '10' domain = MBReqDomain_InnerShareable; when '11' domain = MBReqDomain_FullSystem; case CRm<1:0> of when '01' types = MBReqTypes_Reads; when '10' types = MBReqTypes_Writes; when '11' types = MBReqTypes_All; otherwise if CRm<3:2> == '01' then op = MemBarrierOp_PSSBB; elsif CRm<3:2> == '00' then op = MemBarrierOp_SSBB; elsif HaveSBExt() && FALSE then op = MemBarrierOp_SB; else types = MBReqTypes_All; domain = MBReqDomain_FullSystem;
Assembler Symbols
<option> |
Specifies the limitation on the barrier operation. Values are:
All other encodings of CRm that are not listed above are reserved, and can be encoded using the #<imm> syntax. It is implementation defined whether options other than SY are implemented. All unsupported and reserved options must execute as a full system barrier operation, but software must not rely on this behavior. For more information on whether an access is before or after a barrier instruction, see Data Memory Barrier (DMB) or see Data Synchronization Barrier (DSB). |
<imm> |
Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the "CRm" field. |
Operation
case op of when MemBarrierOp_DSB DataSynchronizationBarrier(domain, types); when MemBarrierOp_DMB DataMemoryBarrier(domain, types); when MemBarrierOp_ISB InstructionSynchronizationBarrier(); when MemBarrierOp_SSBB SpeculativeStoreBypassBarrierToVA(); when MemBarrierOp_PSSBB SpeculativeStoreBypassBarrierToPA(); when MemBarrierOp_SB SpeculationBarrier();