CPY (immediate, merging)
Copy signed integer immediate to vector elements (merging).
Copy a signed integer immediate to each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.
The immediate operand is a signed value in the range -128 to +127, and for element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512 (excluding 0).
The immediate is encoded in 8 bits with an optional left shift by 8. The preferred disassembly when the shift option is specified is "#<simm8>, LSL #8". However an assembler and disassembler may also allow use of the shifted 16-bit value unless the immediate is 0 and the shift amount is 8, which must be unambiguously described as "#0, LSL #8".
if !HaveSVE() then UNDEFINED; if size:sh == '001' then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer d = UInt(Zd); boolean merging = TRUE; integer imm = SInt(imm8); if sh == '1' then imm = imm << 8;
Is the name of the destination scalable vector register, encoded in the "Zd" field.
Is the size specifier,
Is the name of the governing scalable predicate register, encoded in the "Pg" field.
Is a signed immediate in the range -128 to 127, encoded in the "imm8" field.
Is the optional left shift to apply to the immediate, defaulting to LSL #0 and
CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(VL) dest = Z[d]; bits(VL) result; for e = 0 to elements-1 if ElemP[mask, e, esize] == '1' then Elem[result, e, esize] = imm<esize-1:0>; elsif merging then Elem[result, e, esize] = Elem[dest, e, esize]; else Elem[result, e, esize] = Zeros(); Z[d] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction that conforms to all of the following requirements, otherwise the behavior of either or both instructions is unpredictable:
- The MOVPRFX instruction must specify the same destination register as this instruction.
- The destination register must not refer to architectural register state referenced by any other source operand register of this instruction.
- An unpredicated MOVPRFX instruction.
- A predicated MOVPRFX instruction using the same governing predicate register and source element size as this instruction.