Broadcast signed immediate to vector elements (unpredicated).
Unconditionally broadcast the signed integer immediate into each element of the destination vector. This instruction is unpredicated.
The immediate operand is a signed value in the range -128 to +127, and for element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512 (excluding 0).
The immediate is encoded in 8 bits with an optional left shift by 8. The preferred disassembly when the shift option is specified is "#<simm8>, LSL #8". However an assembler and disassembler may also allow use of the shifted 16-bit value unless the immediate is 0 and the shift amount is 8, which must be unambiguously described as "#0, LSL #8".
if !HaveSVE() then UNDEFINED; if size:sh == '001' then UNDEFINED; integer esize = 8 << UInt(size); integer d = UInt(Zd); integer imm = SInt(imm8); if sh == '1' then imm = imm << 8;
Is the name of the destination scalable vector register, encoded in the "Zd" field.
Is the size specifier,
Is a signed immediate in the range -128 to 127, encoded in the "imm8" field.
Is the optional left shift to apply to the immediate, defaulting to LSL #0 and