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RDVL

Read multiple of vector register size to scalar register.

Multiply the current vector register size in bytes by an immediate in the range -32 to 31 and place the result in the 64-bit destination general-purpose register.

313029282726252423222120191817161514131211109876543210
000001001011111101010imm6Rd

RDVL <Xd>, #<imm>

if !HaveSVE() then UNDEFINED;
integer d = UInt(Rd);
integer imm = SInt(imm6);

Assembler Symbols

<Xd>

Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field.

<imm>

Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operation

CheckSVEEnabled();
integer len = imm * (VL DIV 8);
X[d] = len<63:0>;
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