Arm® A64 Instruction Set Architecture: Armv8, for Armv8-A architecture profile | LDRSW (literal): Load Register Signed Word (literal).

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LDRSW (literal)

Load Register Signed Word (literal) calculates an address from the PC value and an immediate offset, loads a word from memory, and writes it to a register. For information about memory accesses, see Load/Store addressing modes.

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1	0	0	1	1	0	0	0	imm19																			Rt
opc

LDRSW <Xt>, <label>

integer t = UInt(Rt);
bits(64) offset;

offset = SignExtend(imm19:'00', 64);

Assembler Symbols

<Xt>	Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.

<label>

Is the program label from which the data is to be loaded. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4.

Operation

bits(64) address = PC[] + offset;
bits(32) data;

if HaveMTEExt() then
    SetTagCheckedInstruction(FALSE);

data = Mem[address, 4, AccType_NORMAL];
X[t] = SignExtend(data, 64);

Operational information

If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.

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