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DCPS1, DCPS2, DCPS3

DCPSx, Debug Change PE State to ELx, where x is 1, 2, or 3.

When executed in Debug state, the target Exception level of the instruction is:

  • ELx, if the instruction is executed at an Exception level lower than ELx.
  • Otherwise, the Exception level at which the instruction is executed.

On executing a DCPSx instruction in Debug state when the instruction is not undefined:

  • If the instruction is executed at an Exception level that is lower than the target Exception level the PE enters the target Exception level, Elx, and:
    • If ELx is using AArch64, the PE selects SP_ELx.
    • If the target Exception level is EL1 using AArch32 the PE enters Supervisor mode.
    • If the instruction was executed in Non-secure state and the target Exception level is EL2 using AArch32 the PE enters Hyp mode.
    • If the target Exception level is EL3 using AArch32 the PE enters Supervisor mode and SCR.NS is set to 0.
  • Otherwise, there is no change to the Exception level and:
    • If the instruction was executed at EL1 the PE enters Supervisor mode.
    • If the instruction was executed at EL2 the PE remains in Hyp mode.
    • If the instruction was a DCPS1 instruction executed at EL3 the PE enters Supervisor mode and SCR.NS is set to 0.
    • If the instruction was a DCPS3 instruction executed at EL3 the PE enters Monitor mode and SCR.NS is set to 0.

These instructions are always undefined in Non-debug state.

DCPS1 is undefined at EL0 if:

  • EL2 is using AArch64 and enabled in the current Security state, and HCR_EL2.TGE == 1.
  • EL2 is using AArch32 in Non-Secure state, and HCR.TGE == 1.

DCPS2 is undefined at all Exception levels if EL2 is not implemented.

DCPS2 is undefined in the following states if EL2 is implemented:

  • At EL0 and EL1, when EL2 is not enabled in the current Security state.
  • At EL3 if EL3 is using AArch32.

DCPS3 is undefined at all Exception levels if either:

  • EDSCR.SDD == 1.
  • EL3 is not implemented.

On executing a DCPSx instruction that is not undefined and targets ELx:

  • If ELx is using AArch64:
    • ELR_ELx, SPSR_ELx, and ESR_ELx become unknown.
    • DLR_EL0 and DSPSR_EL0 become unknown.
  • If ELx is using AArch32 DLR and DSPSR become unknown and:
    • If the target Exception level is EL1 or EL3, the LR and SPSR of the target PE mode become unknown.
    • If the target Exception level is EL2, then ELR_hyp, SPSR_hyp, and HSR become unknown.

For more information on the operation of these instructions, see DCPS.

T1

15141312111098765432101514131211109876543210
111101111000111110000000000000opt

DCPS1 (opt == 01)

DCPS1

DCPS2 (opt == 10)

DCPS2

DCPS3 (opt == 11)

DCPS3

if !Halted() || opt == '00' then UNDEFINED;

Operation

DCPSInstruction(opt);
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