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HLT
Halting breakpoint causes a software breakpoint to occur.
Halting breakpoint is always unconditional, even inside an IT block.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
A1
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
!= 1111 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | imm12 | 0 | 1 | 1 | 1 | imm4 | |||||||||||||||||
cond |
if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED; if cond != '1110' then UNPREDICTABLE; // HLT must be encoded with AL condition
CONSTRAINED UNPREDICTABLE behavior
If cond != '1110', then one of the following behaviors must occur:
- The instruction is undefined.
- The instruction executes as NOP.
- The instruction executes unconditionally.
- The instruction executes conditionally.
T1
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | imm6 |
if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED;
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
Assembler Symbols
<q> |
See Standard assembler syntax fields. An HLT instruction must be unconditional. |