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RRX

Rotate Right with Extend provides the value of the contents of a register shifted right by one place, with the Carry flag shifted into bit[31].

This is an alias of MOV, MOVS (register). This means:

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T3 ) .

A1

313029282726252423222120191817161514131211109876543210
!= 111100011010(0)(0)(0)(0)Rd00000110Rm
condSimm5type

MOV, rotate right with extend

RRX{<c>}{<q>} {<Rd>,} <Rm>

is equivalent to

MOV{<c>}{<q>} <Rd>, <Rm>, RRX

and is always the preferred disassembly.

T3

15141312111098765432101514131211109876543210
1110101001001111(0)000Rd0011Rm
Simm3imm2type

MOV, rotate right with extend

RRX{<c>}{<q>} {<Rd>,} <Rm>

is equivalent to

MOV{<c>}{<q>} <Rd>, <Rm>, RRX

and is always the preferred disassembly.

Assembler Symbols

<c>

See Standard assembler syntax fields.

<q>

See Standard assembler syntax fields.

<Rd>

For encoding A1: is the general-purpose destination register, encoded in the "Rd" field. Arm deprecates using the PC as the destination register, but if the PC is used, the instruction is a branch to the address calculated by the operation. This is an interworking branch, see Pseudocode description of operations on the AArch32 general-purpose registers and the PC.

For encoding T3: is the general-purpose destination register, encoded in the "Rd" field.

<Rm>

For encoding A1: is the general-purpose source register, encoded in the "Rm" field. The PC can be used, but this is deprecated.

For encoding T3: is the general-purpose source register, encoded in the "Rm" field.

Operation

The description of MOV, MOVS (register) gives the operational pseudocode for this instruction.

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