Load Register Byte (literal) calculates an address from the PC value and an immediate offset, loads a byte from memory, zero-extends it to form a 32-bit word, and writes it to a register. For information about memory accesses see Memory accesses.
A1 (!(P == 0 && W == 1))
if P == '0' && W == '1' then SEE "LDRBT"; t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1'); wback = (P == '0') || (W == '1'); if t == 15 || wback then UNPREDICTABLE;
CONSTRAINED UNPREDICTABLE behavior
If wback, then one of the following behaviors must occur:
- The instruction is undefined.
- The instruction executes as NOP.
- The instruction executes with the additional decode: wback = FALSE;.
- The instruction treats bit as the P bit, and bit as the writeback (W) bit, and uses the same addressing mode as described in LDRB (immediate). The instruction uses post-indexed addressing when P == '0' and uses pre-indexed addressing otherwise. The instruction is handled as described in Using R15.
if Rt == '1111' then SEE "PLD"; t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1'); // Armv8-A removes UNPREDICTABLE for R13
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
Is the general-purpose register to be transferred, encoded in the "Rt" field.
Specifies the offset is added to or subtracted from the base register, defaulting to + if omitted and
The alternative syntax permits the addition or subtraction of the offset and the immediate offset to be specified separately, including permitting a subtraction of 0 that cannot be specified using the normal syntax. For more information, see Use of labels in UAL instruction syntax.
if ConditionPassed() then EncodingSpecificOperations(); base = Align(PC,4); address = if add then (base + imm32) else (base - imm32); R[t] = ZeroExtend(MemU[address,1], 32);
If CPSR.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.