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SEL
Select Bytes selects each byte of its result from either its first operand or its second operand, according to the values of the PSTATE.GE flags.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
A1
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
!= 1111 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | Rn | Rd | (1) | (1) | (1) | (1) | 1 | 0 | 1 | 1 | Rm | ||||||||||||
cond |
d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;
T1
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | Rn | 1 | 1 | 1 | 1 | Rd | 1 | 0 | 0 | 0 | Rm |
d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); if d == 15 || n == 15 || m == 15 then UNPREDICTABLE; // Armv8-A removes UNPREDICTABLE for R13
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
Assembler Symbols
<c> |
<q> |
<Rd> |
Is the general-purpose destination register, encoded in the "Rd" field. |
<Rn> |
Is the first general-purpose source register, encoded in the "Rn" field. |
<Rm> |
Is the second general-purpose source register, encoded in the "Rm" field. |
Operation
if ConditionPassed() then EncodingSpecificOperations(); R[d]<7:0> = if PSTATE.GE<0> == '1' then R[n]<7:0> else R[m]<7:0>; R[d]<15:8> = if PSTATE.GE<1> == '1' then R[n]<15:8> else R[m]<15:8>; R[d]<23:16> = if PSTATE.GE<2> == '1' then R[n]<23:16> else R[m]<23:16>; R[d]<31:24> = if PSTATE.GE<3> == '1' then R[n]<31:24> else R[m]<31:24>;