LSL (register)
Logical Shift Left (register) shifts a register value left by a variable number of bits, shifting in zeros, and writes the result to the destination register. The variable number of bits is read from the bottom byte of a register.
This is an alias of MOV, MOVS (register-shifted register). This means:
- The encodings in this description are named to match the encodings of MOV, MOVS (register-shifted register).
- The description of MOV, MOVS (register-shifted register) gives the operational pseudocode for this instruction.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .
A1
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| != 1111 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | (0) | (0) | (0) | (0) | Rd | Rs | 0 | 0 | 0 | 1 | Rm | ||||||||||||
| cond | S | stype | |||||||||||||||||||||||||||||
Not flag setting
LSL{<c>}{<q>} {<Rd>,} <Rm>, <Rs>
is equivalent to
MOV{<c>}{<q>} <Rd>, <Rm>, LSL <Rs>
and is always the preferred disassembly.
T1
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | Rdm | ||||
| op | |||||||||||||||
Logical shift left
LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> // (Inside IT block)
is equivalent to
MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs>
and is the preferred disassembly when InITBlock().
T2
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | Rm | 1 | 1 | 1 | 1 | Rd | 0 | 0 | 0 | 0 | Rs | |||||||||
| stype | S | ||||||||||||||||||||||||||||||
Not flag setting
LSL<c>.W {<Rd>,} <Rm>, <Rs> // (Inside IT block, and <Rd>, <Rm>, <shift>, <Rs> can be represented in T1)
LSL{<c>}{<q>} {<Rd>,} <Rm>, <Rs>
is equivalent to
MOV{<c>}{<q>} <Rd>, <Rm>, LSL <Rs>
and is always the preferred disassembly.
Assembler Symbols
| <c> |
| <q> |
| <Rdm> |
Is the first general-purpose source register and the destination register, encoded in the "Rdm" field. |
| <Rd> |
Is the general-purpose destination register, encoded in the "Rd" field. |
| <Rm> |
Is the first general-purpose source register, encoded in the "Rm" field. |
| <Rs> |
Is the second general-purpose source register holding a shift amount in its bottom 8 bits, encoded in the "Rs" field. |
Operation
The description of MOV, MOVS (register-shifted register) gives the operational pseudocode for this instruction.