You copied the Doc URL to your clipboard.
MVN, MVNS (register-shifted register)
Bitwise NOT (register-shifted register) writes the bitwise inverse of a register-shifted register value to the destination register. It can optionally update the condition flags based on the result.
A1
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
!= 1111 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | S | (0) | (0) | (0) | (0) | Rd | Rs | 0 | stype | 1 | Rm | |||||||||||||
cond |
d = UInt(Rd); m = UInt(Rm); s = UInt(Rs); setflags = (S == '1'); shift_t = DecodeRegShift(stype); if d == 15 || m == 15 || s == 15 then UNPREDICTABLE;
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
Assembler Symbols
<c> |
<q> |
<Rd> |
Is the general-purpose destination register, encoded in the "Rd" field. |
<Rm> |
Is the general-purpose source register, encoded in the "Rm" field. |
<shift> |
Is the type of shift to be applied to the second source register,
encoded in
stype:
|
<Rs> |
Is the general-purpose source register holding a shift amount in its bottom 8 bits, encoded in the "Rs" field. |
Operation
if ConditionPassed() then EncodingSpecificOperations(); shift_n = UInt(R[s]<7:0>); (shifted, carry) = Shift_C(R[m], shift_t, shift_n, PSTATE.C); result = NOT(shifted); R[d] = result; if setflags then PSTATE.N = result<31>; PSTATE.Z = IsZeroBit(result); PSTATE.C = carry; // PSTATE.V unchanged