Arm® A32/T32 Instruction Set Architecture: Armv8, for Armv8-A architecture profile Documentation | PUSH (single register): Push Single Register to Stack: an alias of STR (immediate).

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PUSH (single register)

Push Single Register to Stack stores a single general-purpose register to the stack, storing to the 32-bit word below the address in SP, and updates SP to point to the start of the stored data.

This is an alias of STR (immediate). This means:

The encodings in this description are named to match the encodings of STR (immediate).
The description of STR (immediate) gives the operational pseudocode for this instruction.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T4 ) .

A1

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
!= 1111				0	1	0	1	0	0	1	0	1	1	0	1	Rt				0	0	0	0	0	0	0	0	0	1	0	0
cond							P	U		W		Rn								imm12

Pre-indexed

PUSH{<c>}{<q>} <single_register_list>

is equivalent to

STR{<c>}{<q>} <Rt>, [SP, #-4]!

and is always the preferred disassembly.

T4

15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	1	1	0	0	0	0	1	0	0	1	1	0	1	Rt				1	1	0	1	0	0	0	0	0	1	0	0
												Rn									P	U	W	imm8

Pre-indexed

PUSH{<c>}{<q>} <single_register_list> // (Standard syntax)

is equivalent to

STR{<c>}{<q>} <Rt>, [SP, #-4]!

and is always the preferred disassembly.

Assembler Symbols

<c>	See Standard assembler syntax fields.

<q>	See Standard assembler syntax fields.

<single_register_list>

Is the general-purpose register <Rt> to be stored surrounded by { and }.

<Rt>	For encoding A1: is the general-purpose register to be transferred, encoded in the "Rt" field. The PC can be used, but this is deprecated.
	For encoding T4: is the general-purpose register to be transferred, encoded in the "Rt" field.

Operation

The description of STR (immediate) gives the operational pseudocode for this instruction.

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