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ADR

Form PC-relative address adds an immediate value to the PC value to form a PC-relative address, and writes the result to the destination register.

This instruction is used by the alias SUB (immediate, from PC).

This instruction is used by the pseudo-instruction ADD (immediate, to PC).

It has encodings from the following instruction sets: A32 ( A1 and A2 ) and T32 ( T1 , T2 and T3 ) .

A1

313029282726252423222120191817161514131211109876543210
!= 1111001010001111Rdimm12
cond

A1

ADR{<c>}{<q>} <Rd>, <label>

d = UInt(Rd);  imm32 = A32ExpandImm(imm12);  add = TRUE;

A2

313029282726252423222120191817161514131211109876543210
!= 1111001001001111Rdimm12
cond

A2

ADR{<c>}{<q>} <Rd>, <label>

d = UInt(Rd);  imm32 = A32ExpandImm(imm12);  add = FALSE;

T1

1514131211109876543210
10100Rdimm8

T1

ADR{<c>}{<q>} <Rd>, <label>

d = UInt(Rd);  imm32 = ZeroExtend(imm8:'00', 32);  add = TRUE;

T2

15141312111098765432101514131211109876543210
11110i10101011110imm3Rdimm8

T2

ADR{<c>}{<q>} <Rd>, <label>

d = UInt(Rd);  imm32 = ZeroExtend(i:imm3:imm8, 32);  add = FALSE;
if d == 15 then UNPREDICTABLE;     // Armv8-A removes UNPREDICTABLE for R13

T3

15141312111098765432101514131211109876543210
11110i10000011110imm3Rdimm8

T3

ADR{<c>}.W <Rd>, <label> // (<Rd>, <label> can be presented in T1)

ADR{<c>}{<q>} <Rd>, <label>

d = UInt(Rd);  imm32 = ZeroExtend(i:imm3:imm8, 32);  add = TRUE;
if d == 15 then UNPREDICTABLE;   // Armv8-A removes UNPREDICTABLE for R13

For more information about the constrained unpredictable behavior, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<c>

See Standard assembler syntax fields.

<q>

See Standard assembler syntax fields.

<Rd>

For encoding A1 and A2: is the general-purpose destination register, encoded in the "Rd" field. If the PC is used, the instruction is a branch to the address calculated by the operation. This is an interworking branch, see Pseudocode description of operations on the AArch32 general-purpose registers and the PC.

For encoding T1, T2 and T3: is the general-purpose destination register, encoded in the "Rd" field.

<label>

For encoding A1 and A2: the label of an instruction or literal data item whose address is to be loaded into <Rd>. The assembler calculates the required value of the offset from the Align(PC, 4) value of the ADR instruction to this label.

If the offset is zero or positive, encoding A1 is used, with imm32 equal to the offset.

If the offset is negative, encoding A2 is used, with imm32 equal to the size of the offset. That is, the use of encoding A2 indicates that the required offset is minus the value of imm32.

Permitted values of the size of the offset are any of the constants described in Modified immediate constants in A32 instructions.

For encoding T1: the label of an instruction or literal data item whose address is to be loaded into <Rd>. The assembler calculates the required value of the offset from the Align(PC, 4) value of the ADR instruction to this label. Permitted values of the size of the offset are multiples of 4 in the range 0 to 1020.

For encoding T2 and T3: the label of an instruction or literal data item whose address is to be loaded into <Rd>. The assembler calculates the required value of the offset from the Align(PC, 4) value of the ADR instruction to this label.

If the offset is zero or positive, encoding T3 is used, with imm32 equal to the offset.

If the offset is negative, encoding T2 is used, with imm32 equal to the size of the offset. That is, the use of encoding T2 indicates that the required offset is minus the value of imm32.

Permitted values of the size of the offset are 0-4095.

The instruction aliases permit the addition or subtraction of the offset and the immediate offset to be specified separately, including permitting a subtraction of 0 that cannot be specified using the normal syntax. For more information, see Use of labels in UAL instruction syntax.

Alias Conditions

AliasOf variantIs preferred when
ADD (immediate, to PC)Never
SUB (immediate, from PC)T2i:imm3:imm8 == '000000000000'
SUB (immediate, from PC)A2imm12 == '000000000000'

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    result = if add then (Align(PC,4) + imm32) else (Align(PC,4) - imm32);
    if d == 15 then          // Can only occur for A32 encodings
        ALUWritePC(result);
    else
        R[d] = result;
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