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CPS, CPSID, CPSIE

Change PE State changes one or more of the PSTATE.{A, I, F} interrupt mask bits and, optionally, the PSTATE.M mode field, without changing any other PSTATE bits.

CPS is treated as NOP if executed in User mode unless it is defined as being constrained unpredictable elsewhere in this section.

The PE checks whether the value being written to PSTATE.M is legal. See Illegal changes to PSTATE.M.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .

A1

313029282726252423222120191817161514131211109876543210
111100010000imodM0(0)(0)(0)(0)(0)(0)(0)AIF0mode

CPS (imod == 00 && M == 1)

CPS{<q>} #<mode> // (Cannot be conditional)

CPSID (imod == 11 && M == 0)

CPSID{<q>} <iflags> // (Cannot be conditional)

CPSID (imod == 11 && M == 1)

CPSID{<q>} <iflags> , #<mode> // (Cannot be conditional)

CPSIE (imod == 10 && M == 0)

CPSIE{<q>} <iflags> // (Cannot be conditional)

CPSIE (imod == 10 && M == 1)

CPSIE{<q>} <iflags> , #<mode> // (Cannot be conditional)

if mode != '00000' && M == '0' then UNPREDICTABLE;
if (imod<1> == '1' && A:I:F == '000') || (imod<1> == '0' && A:I:F != '000') then UNPREDICTABLE;
enable = (imod == '10');  disable = (imod == '11');  changemode = (M == '1');
affectA = (A == '1');  affectI = (I == '1');  affectF = (F == '1');
if (imod == '00' && M == '0') || imod == '01' then UNPREDICTABLE;

CONSTRAINED UNPREDICTABLE behavior

If imod == '01', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.

If imod == '00' && M == '0', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.

If mode != '00000' && M == '0', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction executes with the additional decode: changemode = TRUE.
  • The instruction executes as described, and the value specified by mode is ignored. There are no additional side-effects.

If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction behaves as if imod<1> == '0'.
  • The instruction behaves as if A:I:F has an unknown nonzero value.

If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction behaves as if imod<1> == '1'.
  • The instruction behaves as if A:I:F == '000'.

T1

1514131211109876543210
10110110011im(0)AIF

CPSID (im == 1)

CPSID{<q>} <iflags> // (Not permitted in IT block)

CPSIE (im == 0)

CPSIE{<q>} <iflags> // (Not permitted in IT block)

if A:I:F == '000' then UNPREDICTABLE;
enable = (im == '0');  disable = (im == '1');  changemode = FALSE;
affectA = (A == '1');  affectI = (I == '1');  affectF = (F == '1');
if InITBlock() then UNPREDICTABLE;

CONSTRAINED UNPREDICTABLE behavior

If A:I:F == '000', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.

T2

15141312111098765432101514131211109876543210
111100111010(1)(1)(1)(1)10(0)0(0)imodMAIFmode

CPS (imod == 00 && M == 1)

CPS{<q>} #<mode> // (Not permitted in IT block)

CPSID (imod == 11 && M == 0)

CPSID.W <iflags> // (Not permitted in IT block)

CPSID (imod == 11 && M == 1)

CPSID{<q>} <iflags>, #<mode> // (Not permitted in IT block)

CPSIE (imod == 10 && M == 0)

CPSIE.W <iflags> // (Not permitted in IT block)

CPSIE (imod == 10 && M == 1)

CPSIE{<q>} <iflags>, #<mode> // (Not permitted in IT block)

if imod == '00' && M == '0' then SEE "Hint instructions";
if mode != '00000' && M == '0' then UNPREDICTABLE;
if (imod<1> == '1' && A:I:F == '000') || (imod<1> == '0' && A:I:F != '000') then UNPREDICTABLE;
enable = (imod == '10');  disable = (imod == '11');  changemode = (M == '1');
affectA = (A == '1');  affectI = (I == '1');  affectF = (F == '1');
if imod == '01' || InITBlock() then UNPREDICTABLE;

CONSTRAINED UNPREDICTABLE behavior

If imod == '01', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.

If mode != '00000' && M == '0', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction executes with the additional decode: changemode = TRUE.
  • The instruction executes as described, and the value specified by mode is ignored. There are no additional side-effects.

If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction behaves as if imod<1> == '0'.
  • The instruction behaves as if A:I:F has an unknown nonzero value.

If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:

  • The instruction is undefined.
  • The instruction executes as NOP.
  • The instruction behaves as if imod<1> == '1'.
  • The instruction behaves as if A:I:F == '000'.

Hint instructions: In encoding T2, if the imod field is 00 and the M bit is 0, a hint instruction is encoded. To determine which hint instruction, see Branches and miscellaneous control.

For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<q>

See Standard assembler syntax fields.

<iflags>

Is a sequence of one or more of the following, specifying which interrupt mask bits are affected:

a
Sets the A bit in the instruction, causing the specified effect on PSTATE.A, the SError interrupt mask bit.
i
Sets the I bit in the instruction, causing the specified effect on PSTATE.I, the IRQ interrupt mask bit.
f
Sets the F bit in the instruction, causing the specified effect on PSTATE.F, the FIQ interrupt mask bit.
<mode>

Is the number of the mode to change to, in the range 0 to 31, encoded in the "mode" field.

Operation

if CurrentInstrSet() == InstrSet_A32 then
    EncodingSpecificOperations();
    if PSTATE.EL != EL0 then
        if enable then
            if affectA then PSTATE.A = '0';
            if affectI then PSTATE.I = '0';
            if affectF then PSTATE.F = '0';
        if disable then
            if affectA then PSTATE.A = '1';
            if affectI then PSTATE.I = '1';
            if affectF then PSTATE.F = '1';
        if changemode then
            // AArch32.WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change.
            AArch32.WriteModeByInstr(mode);
else
    EncodingSpecificOperations();
    if PSTATE.EL != EL0 then
        if enable then
            if affectA then PSTATE.A = '0';
            if affectI then PSTATE.I = '0';
            if affectF then PSTATE.F = '0';
        if disable then
            if affectA then PSTATE.A = '1';
            if affectI then PSTATE.I = '1';
            if affectF then PSTATE.F = '1';
        if changemode then
            // AArch32.WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change.
            AArch32.WriteModeByInstr(mode);
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