RRXS
Rotate Right with Extend, setting flags provides the value of the contents of a register shifted right by one place, with the Carry flag shifted into bit[31].
If the destination register is not the PC, this instruction updates the condition flags based on the result, and bit[0] is shifted into the Carry flag.
The field descriptions for <Rd> identify the encodings where the PC is permitted as the destination register. Arm deprecates any use of these encodings. However, when the destination register is the PC:
- The PE branches to the address written to the PC, and restores PSTATE from SPSR_<current_mode>.
- The PE checks SPSR_<current_mode> for an illegal return event. See Illegal return events from AArch32 state.
- The instruction is undefined in Hyp mode.
- The instruction is constrained unpredictable in User mode and System mode.
This is an alias of MOV, MOVS (register). This means:
- The encodings in this description are named to match the encodings of MOV, MOVS (register).
- The description of MOV, MOVS (register) gives the operational pseudocode for this instruction.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T3 ) .
A1
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| != 1111 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | (0) | (0) | (0) | (0) | Rd | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | Rm | |||||||||
| cond | S | imm5 | stype | ||||||||||||||||||||||||||||
MOVS, rotate right with extend
is equivalent to
MOVS{<c>}{<q>} <Rd>, <Rm>, RRX
and is always the preferred disassembly.
T3
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | (0) | 0 | 0 | 0 | Rd | 0 | 0 | 1 | 1 | Rm | ||||||
| S | imm3 | imm2 | stype | ||||||||||||||||||||||||||||
MOVS, rotate right with extend
is equivalent to
MOVS{<c>}{<q>} <Rd>, <Rm>, RRX
and is always the preferred disassembly.
Assembler Symbols
| <c> |
| <q> |
| <Rd> |
For encoding A1: is the general-purpose destination register, encoded in the "Rd" field. Arm deprecates using the PC as the destination register, but if the PC is used, the instruction performs an exception return, that restores PSTATE from SPSR_<current_mode>. |
|
For encoding T3: is the general-purpose destination register, encoded in the "Rd" field. |
Operation
The description of MOV, MOVS (register) gives the operational pseudocode for this instruction.