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UDF

Permanently Undefined generates an Undefined Instruction exception.

The encodings for UDF used in this section are defined as permanently undefined in the Armv8-A architecture. However:

  • With the T32 instruction set, Arm deprecates using the UDF instruction in an IT block.
  • In the A32 instruction set, UDF is not conditional.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .

A1

313029282726252423222120191817161514131211109876543210
111001111111imm121111imm4
cond

A1

UDF{<c>}{<q>} {#}<imm>

imm32 = ZeroExtend(imm12:imm4, 32);
// imm32 is for assembly and disassembly only, and is ignored by hardware.

T1

1514131211109876543210
11011110imm8

T1

UDF{<c>}{<q>} {#}<imm>

imm32 = ZeroExtend(imm8, 32);
// imm32 is for assembly and disassembly only, and is ignored by hardware.

T2

15141312111098765432101514131211109876543210
111101111111imm41010imm12

T2

UDF{<c>}.W {#}<imm> // (<imm> can be represented in T1)

UDF{<c>}{<q>} {#}<imm>

imm32 = ZeroExtend(imm4:imm12, 32);
// imm32 is for assembly and disassembly only, and is ignored by hardware.

Assembler Symbols

<c>

For encoding A1: see Standard assembler syntax fields. <c> must be AL or omitted.

For encoding T1 and T2: see Standard assembler syntax fields. Arm deprecates using any <c> value other than AL.

<q>

See Standard assembler syntax fields.

<imm>

For encoding A1: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm12:imm4" field. The PE ignores the value of this constant.

For encoding T1: is a 8-bit unsigned immediate, in the range 0 to 255, encoded in the "imm8" field. The PE ignores the value of this constant.

For encoding T2: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm4:imm12" field. The PE ignores the value of this constant.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    UNDEFINED;
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