ITLBIASID, Instruction TLB Invalidate by ASID match
The ITLBIASID characteristics are:
Purpose
Invalidate all cached copies of translation table entries from instruction TLBs that meet the following requirements:
- The entry is a stage 1 translation table entry.
- The entry would be used for the specified ASID, and either:
- Is from a level of lookup above the final level.
- Is a non-global entry from the final level of lookup.
- If EL2 is implemented, the entry would be used with the current VMID.
From the entries that match these requirement, the entries that are invalidated are required for the following translation regime:
- If executed at Secure EL1 when EL3 is using AArch64, the Secure EL1&0 translation regime.
- If executed in Secure state when EL3 is using AArch32, the Secure PL1&0 translation regime.
- If executed in Non-secure state, the Non-secure PL1&0 translation regime.
The invalidation only applies to the PE that executes this System instruction.
Arm deprecates the use of this System instruction. It is only provided for backwards compatibility with earlier versions of the Arm architecture.
Configuration
Attributes
ITLBIASID is a 32-bit System instruction.
Field descriptions
The ITLBIASID input value bit assignments are:
Bits [31:8]
Reserved, RES0.
ASID, bits [7:0]
ASID value to match. Any TLB entries for non-global pages that match the ASID values will be affected by this System instruction.
Executing the ITLBIASID instruction
Accesses to this instruction use the following encodings:
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1111 | 0b000 | 0b1000 | 0b0101 | 0b010 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T8 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T8 == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TTLB == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR.TTLB == '1' then AArch32.TakeHypTrapException(0x03); else ITLBIASID(R[t]); elsif PSTATE.EL == EL2 then ITLBIASID(R[t]); elsif PSTATE.EL == EL3 then ITLBIASID(R[t]);