AMEVCNTR0<n>, Activity Monitors Event Counter Registers 0, n = 0 - 15
The AMEVCNTR0<n> characteristics are:
Purpose
Provides access to the architected activity monitor event counters.
Configuration
External register AMEVCNTR0<n> bits [63:0] are architecturally mapped to AArch64 System register AMEVCNTR0<n>_EL0[63:0] .
External register AMEVCNTR0<n> bits [63:0] are architecturally mapped to AArch32 System register AMEVCNTR0<n>[63:0] .
The power domain of AMEVCNTR0<n> is IMPLEMENTATION DEFINED. Some or all RW fields of this register have defined reset values. These apply only on a reset of the reset domain in which the register is implemented. The register is not affected by a reset of any other reset domain.
This register is present only when AMUv1 is implemented. Otherwise, direct accesses to AMEVCNTR0<n> are RES0.
Attributes
AMEVCNTR0<n> is a 64-bit register.
Field descriptions
The AMEVCNTR0<n> bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
ACNT | |||||||||||||||||||||||||||||||
ACNT | |||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ACNT, bits [63:0]
Architected activity monitor event counter n.
Value of architected activity monitor event counter n, where n is the number of this register and is a number from 0 to 15.
If the counter is enabled, writes to this register have UNPREDICTABLE results.
On a Cold reset, this field resets to 0.
Accessing the AMEVCNTR0<n>
If <n> is greater than or equal to the number of architected activity monitor event counters, reads and writes of AMEVCNTR0<n> are CONSTRAINED UNPREDICTABLE, and accesses to the register behave as RAZ/WI.
AMCGCR.CG0NC identifies the number of architected activity monitor event counters.
AMEVCNTR0<n> can be accessed through the memory-mapped interfaces:
Component | Offset | Instance | Range |
---|---|---|---|
AMU | 0x000 + 8n | AMEVCNTR0<n> | 31:0 |
Access on this interface is RO.
Component | Offset | Instance | Range |
---|---|---|---|
AMU | 0x004 + 8n | AMEVCNTR0<n> | 63:32 |
Access on this interface is RO.