CTILAR, CTI Lock Access Register
The CTILAR characteristics are:
Allows or disallows access to the CTI registers through a memory-mapped interface.
CTILAR is in the Debug power domain.
CTILAR ignores writes if the Software lock is not implemented and ignores writes for other accesses to the external debug interface.
The Software Lock provides a lock to prevent memory-mapped writes to the Cross-Trigger Interface registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the Cross-Trigger Interface registers. It does not, and cannot, prevent all accidental or malicious damage.
Software uses CTILAR to set or clear the lock, and CTILSR to check the current status of the lock.
CTILAR is a 32-bit register.
The CTILAR bit assignments are:
KEY, bits [31:0]
Lock Access control. Writing the key value 0xC5ACCE55 to this field unlocks the lock, enabling write accesses to this component's registers through a memory-mapped interface.
Writing any other value to this register locks the lock, disabling write accesses to this component's registers through a memory mapped interface.
Accessing the CTILAR
CTILAR can be accessed through a memory-mapped access to the external debug interface:
Access on this interface is WO.