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TRCCIDR3, Component Identification Register 3

The TRCCIDR3 characteristics are:

Purpose

Provides discovery information for the component.

For additional information see the CoreSight Architecture Specification.

Configuration

This register is present only when ETE is implemented. Otherwise, direct accesses to TRCCIDR3 are RES0.

There are no configuration notes.

Attributes

TRCCIDR3 is a 32-bit register.

Field descriptions

The TRCCIDR3 bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0PRMBL_3

Bits [31:8]

Reserved, RES0.

PRMBL_3, bits [7:0]

Component identification preamble, segment 3.

This field reads as 0xB1.

Accessing the TRCCIDR3

External debugger accesses to this register are unaffected by the OS Lock.

TRCCIDR3 can be accessed through the external debug interface:

ComponentOffset
ETE0xFFC

This interface is accessible as follows:

  • When !IsTraceCorePowered() access to this register returns an Error.
  • Otherwise access to this register is RO.


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