DBGDTRTXext, Debug OS Lock Data Transfer Register, Transmit
The DBGDTRTXext characteristics are:
Purpose
Used for save/restore of DBGDTRTXint. It is a component of the Debug Communication Channel.
Configuration
AArch32 System register DBGDTRTXext bits [31:0] are architecturally mapped to AArch64 System register OSDTRTX_EL1[31:0] .
RW fields in this register reset to architecturally UNKNOWN values.
Attributes
DBGDTRTXext is a 32-bit register.
Field descriptions
The DBGDTRTXext bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Return DTRTX without side-effect | |||||||||||||||||||||||||||||||
Bits [31:0]
Return DTRTX without side-effect.
Reads of this register return the value in DTRTX and do not change TXfull.
Writes of this register update the value in DTRTX and do not change TXfull.
For the full behavior of the Debug Communications Channel, see 'The Debug Communication Channel and Instruction Transfer Register' in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile, chapter H4.
On a Cold reset, this field resets to an architecturally UNKNOWN value.
Accessing the DBGDTRTXext
Arm deprecates reads and writes of DBGDTRTXext through the System register interface when the OS Lock is unlocked, DBGOSLSR.OSLK == 0.
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1110 | 0b000 | 0b0000 | 0b0011 | 0b010 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then
AArch32.TakeHypTrapException(0x05);
elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
return DBGDTRTXext;
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
return DBGDTRTXext;
elsif PSTATE.EL == EL3 then
return DBGDTRTXext;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1110 | 0b000 | 0b0000 | 0b0011 | 0b010 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then
AArch32.TakeHypTrapException(0x05);
elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
DBGDTRTXext = R[t];
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
DBGDTRTXext = R[t];
elsif PSTATE.EL == EL3 then
DBGDTRTXext = R[t];