TRBIDR_EL1, Trace Buffer ID Register

The TRBIDR_EL1 characteristics are:

Purpose

Provides information to software as to whether the trace buffer can be programmed at the current Exception level.

Configuration

This register is present only when TRBE is implemented. Otherwise, direct accesses to TRBIDR_EL1 are UNDEFINED.

Attributes

TRBIDR_EL1 is a 64-bit register.

Field descriptions

The TRBIDR_EL1 bit assignments are:

Bits [63:6]

Reserved, RES0.

F, bit [5]

Flag Updates. Defines whether the address translation performed by the Trace Buffer Extension manages the Access Flag and dirty state.

P, bit [4]

Programming not allowed. The trace buffer is owned by a higher Exception level or by the other Security state.

The value read from this field depends on the current Exception level and the values of MDCR_EL3.NSTB and MDCR_EL2.E2TB:

• If MDCR_EL3.NSTB == 0b00 or 0b01, this bit reads as one from Non-secure EL2 and EL1.

• If MDCR_EL3.NSTB == 0b10 or 0b11, this bit reads as one from Secure EL2 and EL1.

• If EL2 is implemented and enabled, and MDCR_EL2.E2TB == 0b00, this bit reads as one from EL1.

Otherwise, this bit reads as zero.

Align, bits [3:0]

Defines the minimum alignment constraint for writes to TRBPTR_EL1 and TRBTRG_EL1.

All other values are reserved.

if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    return TRBIDR_EL1;
elsif PSTATE.EL == EL2 then
    return TRBIDR_EL1;
elsif PSTATE.EL == EL3 then
    return TRBIDR_EL1;