AMCIDR3, Activity Monitors Component Identification Register 3
The AMCIDR3 characteristics are:
Provides information to identify an activity monitors component.
For more information, see About the Component identification scheme in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.
The power domain of AMCIDR3 is IMPLEMENTATION DEFINED.
Implementation of this register is OPTIONAL.
This register is present only when AMUv1 is implemented. Otherwise, direct accesses to AMCIDR3 are RES0.
AMCIDR3 is a 32-bit register.
The AMCIDR3 bit assignments are:
PRMBL_3, bits [7:0]
Preamble. Reads as 0xB1.
Accessing the AMCIDR3
AMCIDR3 can be accessed through the memory-mapped interfaces:
Accesses on this interface are RO.