MPAMCFG_MBW_PBM, MPAM Bandwidth Portion Bitmap Partition Configuration Register
The MPAMCFG_MBW_PBM characteristics are:
Purpose
The MPAMCFG_MBW_PBM register is a read-write register that configures the cache portions that a PARTID is allowed to allocate. MPAMCFG_MBW_PBM_s controls the bandwidth portion bitmap for the Secure PARTID selected by the Secure instance of MPAMCFG_PART_SEL. MPAMCFG_MBW_PBM_ns controls the bandwidth portion bitmap for the Non-secure PARTID selected by the Non-secure instance of MPAMCFG_PART_SEL.
After setting MPAMCFG_PART_SEL with a PARTID, software (usually a hypervisor) writes to the MPAMCFG_CPBM register to configure which cache portions the PARTID is allowed to allocate.
Configuration
The power domain of MPAMCFG_MBW_PBM is IMPLEMENTATION DEFINED.
This register is present only when MPAMF_IDR.HAS_MBW_PART == 1 and MPAMF_MBW_IDR.HAS_PBM == 1. Otherwise, direct accesses to MPAMCFG_MBW_PBM are RES0.
Attributes
MPAMCFG_MBW_PBM is a 4096-bit register.
Field descriptions
The MPAMCFG_MBW_PBM bit assignments are:
BWPBM<n>, bit [n], for n = 0 to 4095
Each bit BWPBM<n> grants permission to the PARTID to allocate bandwidth within bandwidth portion n.
BWPBM<n> | Meaning |
---|---|
0b0 |
The PARTID is not permitted to allocate into bandwidth portion n. |
0b1 |
The PARTID is permitted to allocate within bandwidth portion n. |
The number of bits in the bandwidth portion partitioning bit map of this component is given in MPAMF_MBW_IDR.BWPBM_WD. BWPBM_WD contains a value from 1 to 212, inclusive. Values of BWPBM_WD greater than 32 require a group of 32-bit registers to access the BWPBM, up to 128 32-bit registers.
Bits BWPBM<n>, where n is greater than BWPBM_WD, are not required to be implemented.
Accessing the MPAMCFG_MBW_PBM
This register is within the MPAM feature page memory frames. In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MPAMCFG_MBW_PBM_s must be accessible from the Secure MPAM feature page. MPAMCFG_MBW_PBM_ns must be accessible from the Non-secure MPAM feature page.
MPAMCFG_MBW_PBM_s and MPAMCFG_MBW_PBM_ns must be separate registers. The Secure instance (MPAMCFG_MBW_PBM_s) accesses the memory bandwidth portion bitmaps used for Secure PARTIDs, and the Non-secure instance (MPAMCFG_MBW_PBM_ns) accesses the memory bandwidth portion bitmaps used for Non-secure PARTIDs.
MPAMCFG_MBW_PBM can be accessed through the memory-mapped interfaces:
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x2000 | MPAMCFG_MBW_PBM_s |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_ns | 0x2000 | MPAMCFG_MBW_PBM_ns |
Accesses on this interface are RW.