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TRCIDR10, ID Register 10
The TRCIDR10 characteristics are:
Purpose
Returns the tracing capabilities of the trace unit.
Configuration
External register TRCIDR10 bits [31:0] are architecturally mapped to AArch64 System register TRCIDR10[31:0] .
This register is present only when ETE is implemented. Otherwise, direct accesses to TRCIDR10 are RES0.
Attributes
TRCIDR10 is a 32-bit register.
Field descriptions
The TRCIDR10 bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| NUMP1KEY | |||||||||||||||||||||||||||||||
NUMP1KEY, bits [31:0]
When TRCIDR0.TRCDATA != 0b00:
When TRCIDR0.TRCDATA != 0b00:
Indicates the number of P1 right-hand keys. Data tracing is not implemented in ETE and this field is reserved for other trace architectures. Allocated in other trace architectures.
Otherwise:
Otherwise:
Reserved, RES0.
Accessing the TRCIDR10
TRCIDR10 can be accessed through the external debug interface:
| Component | Offset |
|---|---|
| ETE | 0x188 |
This interface is accessible as follows:
- When OSLockStatus() or !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RO.