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CP15DSB, Data Synchronization Barrier System instruction
The CP15DSB characteristics are:
Purpose
Performs a Data Synchronization Barrier.
Arm deprecates any use of this System instruction, and strongly recommends that software use the DSB instruction instead.
Configuration
Attributes
CP15DSB is a 32-bit System instruction.
Field descriptions
CP15DSB ignores the value in the register specified by the instruction encoding. Software does not have to write a value to the register before issuing this instruction.
Executing the CP15DSB instruction
Accesses to this instruction use the following encodings:
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1111 | 0b000 | 0b0111 | 0b1010 | 0b100 |
if PSTATE.EL == EL0 then
if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && SCTLR_EL1.CP15BEN == '0' then
UNDEFINED;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && SCTLR_EL2.CP15BEN == '0' then
UNDEFINED;
elsif ELUsingAArch32(EL1) && SCTLR.CP15BEN == '0' then
UNDEFINED;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> != '11' && HSTR_EL2.T7 == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x03);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T7 == '1' then
AArch32.TakeHypTrapException(0x03);
else
CP15DSB();
elsif PSTATE.EL == EL1 then
if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T7 == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x03);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T7 == '1' then
AArch32.TakeHypTrapException(0x03);
elsif ELUsingAArch32(EL1) && SCTLR.CP15BEN == '0' then
UNDEFINED;
else
CP15DSB();
elsif PSTATE.EL == EL2 then
if HSCTLR.CP15BEN == '0' then
UNDEFINED;
else
CP15DSB();
elsif PSTATE.EL == EL3 then
CP15DSB();