DBGDCCINT, DCC Interrupt Enable Register
The DBGDCCINT characteristics are:
Purpose
Enables interrupt requests to be signaled based on the DCC status flags.
Configuration
AArch32 System register DBGDCCINT bits [31:0] are architecturally mapped to AArch64 System register MDCCINT_EL1[31:0] .
Some or all RW fields of this register have defined reset values. These apply only if the PE resets into an Exception level that is using AArch32. Otherwise, RW fields in this register reset to architecturally UNKNOWN values.
Attributes
DBGDCCINT is a 32-bit register.
Field descriptions
The DBGDCCINT bit assignments are:
Bit [31]
Reserved, RES0.
RX, bit [30]
DCC interrupt request enable control for DTRRX. Enables a common COMMIRQ interrupt request to be signaled based on the DCC status flags.
RX | Meaning |
---|---|
0b0 |
No interrupt request generated by DTRRX. |
0b1 |
Interrupt request will be generated on RXfull == 1. |
If legacy COMMRX and COMMTX signals are implemented, then these are not affected by the value of this bit.
On a Warm reset, this field resets to 0.
TX, bit [29]
DCC interrupt request enable control for DTRTX. Enables a common COMMIRQ interrupt request to be signaled based on the DCC status flags.
TX | Meaning |
---|---|
0b0 |
No interrupt request generated by DTRTX. |
0b1 |
Interrupt request will be generated on TXfull == 0. |
If legacy COMMRX and COMMTX signals are implemented, then these are not affected by the value of this bit.
On a Warm reset, this field resets to 0.
Bits [28:0]
Reserved, RES0.
Accessing the DBGDCCINT
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1110 | 0b000 | 0b0000 | 0b0010 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.TDCC == '1' then AArch32.TakeHypTrapException(0x05); elsif EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then AArch32.TakeHypTrapException(0x05); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else return DBGDCCINT; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else return DBGDCCINT; elsif PSTATE.EL == EL3 then if PSTATE.M != M32_Monitor && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); else return DBGDCCINT;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1110 | 0b000 | 0b0000 | 0b0010 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.TDCC == '1' then AArch32.TakeHypTrapException(0x05); elsif EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then AArch32.TakeHypTrapException(0x05); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else DBGDCCINT = R[t]; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else DBGDCCINT = R[t]; elsif PSTATE.EL == EL3 then if PSTATE.M != M32_Monitor && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); else DBGDCCINT = R[t];