AMEVTYPER0<n>, Activity Monitors Event Type Registers 0, n = 0 - 15
The AMEVTYPER0<n> characteristics are:
Provides information on the events that an architected activity monitor event counter AMEVCNTR0<n> counts.
External register AMEVTYPER0<n> bits [31:0] are architecturally mapped to AArch64 System register AMEVTYPER0<n>_EL0[31:0] .
External register AMEVTYPER0<n> bits [31:0] are architecturally mapped to AArch32 System register AMEVTYPER0<n>[31:0] .
The power domain of AMEVTYPER0<n> is IMPLEMENTATION DEFINED.
This register is present only when AMUv1 is implemented. Otherwise, direct accesses to AMEVTYPER0<n> are RES0.
AMEVTYPER0<n> is a 32-bit register.
The AMEVTYPER0<n> bit assignments are:
evtCount, bits [15:0]
Event to count. The event number of the event that is counted by the architected activity monitor event counter AMEVCNTR0<n>. The value of this field is architecturally mandated for each architected counter.
The following table shows the mapping between required event numbers and the corresponding counters:
Processor frequency cycles
|When n == 0|
Constant frequency cycles
|When n == 1|
|When n == 2|
Memory stall cycles
|When n == 3|
Accessing the AMEVTYPER0<n>
If <n> is greater than or equal to the number of architected activity monitor event counters, reads and writes of AMEVTYPER0<n> are CONSTRAINED UNPREDICTABLE, and accesses to the register behave as RAZ/WI.
AMCGCR.CG0NC identifies the number of architected activity monitor event counters.
AMEVTYPER0<n> can be accessed through the memory-mapped interfaces:
|AMU||0x400 + 4n||AMEVTYPER0<n>|
Accesses on this interface are RO.