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CTILAR, CTI Lock Access Register

The CTILAR characteristics are:


Allows or disallows access to the CTI registers through a memory-mapped interface.

The optional Software Lock provides a lock to prevent memory-mapped writes to the Cross-Trigger Interface registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the Cross-Trigger Interface registers. It does not, and cannot, prevent all accidental or malicious damage.


CTILAR is in the Debug power domain.

If ARMv8.4-Debug is implemented, the Software Lock is not implemented.

Software uses CTILAR to set or clear the lock, and CTILSR to check the current status of the lock.


CTILAR is a 32-bit register.

Field descriptions

The CTILAR bit assignments are:

When the Software Lock is implemented.:

KEY, bits [31:0]

Lock Access control. Writing the key value 0xC5ACCE55 to this field unlocks the lock, enabling write accesses to this component's registers through a memory-mapped interface.

Writing any other value to this register locks the lock, disabling write accesses to this component's registers through a memory mapped interface.



Bits [31:0]

Reserved, RES0.

Accessing the CTILAR

CTILAR can be accessed through a memory-mapped access to the external debug interface:


Accesses on this interface are WO.

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