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JOSCR, Jazelle OS Control Register
The JOSCR characteristics are:
Purpose
A Jazelle register, which provides operating system control of the Jazelle Extension.
Configuration
This register is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to JOSCR are UNKNOWN.
Attributes
JOSCR is a 32-bit register.
Field descriptions
The JOSCR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RAZ/WI |
Bits [31:0]
Reserved, RAZ/WI.
Accessing the JOSCR
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1110 | 0b111 | 0b0001 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then if boolean IMPLEMENTATION_DEFINED "JOSCR UNDEFINED at EL0" then UNDEFINED; else return JOSCR; elsif PSTATE.EL == EL1 then return JOSCR; elsif PSTATE.EL == EL2 then return JOSCR; elsif PSTATE.EL == EL3 then return JOSCR;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1110 | 0b111 | 0b0001 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then if boolean IMPLEMENTATION_DEFINED "JOSCR UNDEFINED at EL0" then UNDEFINED; else //no operation elsif PSTATE.EL == EL1 then //no operation elsif PSTATE.EL == EL2 then //no operation elsif PSTATE.EL == EL3 then //no operation