You copied the Doc URL to your clipboard.

CTILSR, CTI Lock Status Register

The CTILSR characteristics are:


Indicates the current status of the Software Lock for CTI registers.

The optional Software Lock provides a lock to prevent memory-mapped writes to the Cross-Trigger Interface registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the Cross-Trigger Interface registers. It does not, and cannot, prevent all accidental or malicious damage.


CTILSR is in the Debug power domain.

If ARMv8.4-Debug is implemented, the Software Lock is not implemented.

Software uses CTILAR to set or clear the lock, and CTILSR to check the current status of the lock.


CTILSR is a 32-bit register.

Field descriptions

The CTILSR bit assignments are:


Bits [31:3]

Reserved, RES0.

nTT, bit [2]

Not thirty-two bit access required. RAZ.

SLK, bit [1]

When the Software Lock is implemented.:

Software Lock status for this component. For an access to LSR that is not a memory-mapped access, or when the Software Lock is not implemented, this field is RES0.

For memory-mapped accesses when the Software Lock is implemented, possible values of this field are:


Lock clear. Writes are permitted to this component's registers.


Lock set. Writes to this component's registers are ignored, and reads have no side effects.

On a External debug reset, this field resets to 1.


Reserved, RAZ.

SLI, bit [0]

Software Lock implemented. For an access to LSR that is not a memory-mapped access, this field is RAZ. For memory-mapped accesses, the value of this field is IMPLEMENTATION DEFINED. Permitted values are:


Software Lock not implemented or not memory-mapped access.


Software Lock implemented and memory-mapped access.

Accessing the CTILSR

CTILSR can be accessed through a memory-mapped access to the external debug interface:


Accesses on this interface are RO.