EDDEVARCH, External Debug Device Architecture register
The EDDEVARCH characteristics are:
Identifies the programmers' model architecture of the external debug component.
Implementation of this register is OPTIONAL.
If ARMv8.3-DoPD is implemented, this register is in the Core power domain. If ARMv8.3-DoPD is not implemented, this register is in the Debug power domain.
EDDEVARCH is a 32-bit register.
The EDDEVARCH bit assignments are:
ARCHITECT, bits [31:21]
Defines the architecture of the component. For debug, this is Arm Limited.
Bits [31:28] are the JEP106 continuation code, 0x4.
Bits [27:21] are the JEP106 ID code, 0x3B.
PRESENT, bit 
When set to 1, indicates that the DEVARCH is present.
This field is 1 in Armv8.
REVISION, bits [19:16]
Defines the architecture revision. For architectures defined by Arm this is the minor revision.
For debug, the revision defined by Armv8-A is 0x0.
All other values are reserved.
ARCHVER, bits [15:12]
Armv8.0 Debug architecture.
Armv8.0 Debug architecture with Virtualization Host Extensions.
Armv8.2 Debug architecture.
Armv8.4 Debug architecture.
ARMv8.4-Debug adds the functionality indicated by the value 0b1001. ARMv8.2-Debug adds the functionality indicated by the value 0b1000. If ARMv8.1-VHE is not implemented, the only permitted value is 0b0110.
The fields ARCHVER and ARCHPART together form the field ARCHID, so that ARCHVER is ARCHID[15:12].
ARCHPART, bits [11:0]
The part number of the Armv8-A debug component.
The fields ARCHVER and ARCHPART together form the field ARCHID, so that ARCHPART is ARCHID[11:0].
Accessing the EDDEVARCH
EDDEVARCH can be accessed through the external debug interface:
This interface is accessible as follows:
- When ARMv8.3-DoPD is not implemented or IsCorePowered() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.