TRCSTATR, Trace Status Register
The TRCSTATR characteristics are:
Returns the trace unit status.
External register TRCSTATR bits [31:0] are architecturally mapped to AArch64 System register TRCSTATR[31:0] .
This register is present only when ETE is implemented. Otherwise, direct accesses to TRCSTATR are RES0.
TRCSTATR is a 32-bit register.
The TRCSTATR bit assignments are:
PMSTABLE, bit 
Programmers' model stable.
The programmers' model is not stable.
The programmers' model is stable.
This bit is UNKNOWN while the trace unit is enabled.
IDLE, bit 
The trace unit is not idle.
The trace unit is idle.
Accessing the TRCSTATR
TRCSTATR can be accessed through the external debug interface:
This interface is accessible as follows:
- When OSLockStatus(), or !AllowExternalTraceAccess() or !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RO.