CONTEXTIDR, Context ID Register
The CONTEXTIDR characteristics are:
Purpose
Identifies the current Process Identifier and, when using the Short-descriptor translation table format, the Address Space Identifier.
The value of the whole of this register is called the Context ID and is used by:
- The debug logic, for Linked and Unlinked Context ID matching.
- The trace logic, to identify the current process.
The significance of this register is for debug and trace use only.
Configuration
AArch32 System register CONTEXTIDR bits [31:0] are architecturally mapped to AArch64 System register CONTEXTIDR_EL1[31:0] .
This register is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to CONTEXTIDR are UNKNOWN.
The register format depends on whether address translation is using the Long-descriptor or the Short-descriptor translation table format.
Attributes
CONTEXTIDR is a 32-bit register.
Field descriptions
The CONTEXTIDR bit assignments are:
When TTBCR.EAE == 0:
PROCID, bits [31:8]
Process Identifier. This field must be programmed with a unique value that identifies the current process.
This field resets to an architecturally UNKNOWN value.
ASID, bits [7:0]
Address Space Identifier. This field is programmed with the value of the current ASID.
This field resets to an architecturally UNKNOWN value.
When TTBCR.EAE == 1:31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PROCID
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PROCID |
PROCID, bits [31:0]
Process Identifier. This field must be programmed with a unique value that identifies the current process.
This field resets to an architecturally UNKNOWN value.
Accessing the CONTEXTIDR
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1111 | 0b000 | 0b1101 | 0b0000 | 0b001 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T13 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T13 == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TRVM == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TRVM == '1' then AArch32.TakeHypTrapException(0x03); elsif HaveEL(EL3) && ELUsingAArch32(EL3) then return CONTEXTIDR_NS; else return CONTEXTIDR; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && ELUsingAArch32(EL3) then return CONTEXTIDR_NS; else return CONTEXTIDR; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then return CONTEXTIDR_S; else return CONTEXTIDR_NS;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1111 | 0b000 | 0b1101 | 0b0000 | 0b001 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T13 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T13 == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TVM == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TVM == '1' then AArch32.TakeHypTrapException(0x03); elsif HaveEL(EL3) && ELUsingAArch32(EL3) then CONTEXTIDR_NS = R[t]; else CONTEXTIDR = R[t]; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && ELUsingAArch32(EL3) then CONTEXTIDR_NS = R[t]; else CONTEXTIDR = R[t]; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then CONTEXTIDR_S = R[t]; else CONTEXTIDR_NS = R[t];